Protecting a superconducting logical qubit from bit-flip error
The safeguarding of quantum data against arbitrary errors induced by decoherence and faulty hardware is an outstanding challenge for all quantum information platforms. Quantum error correction requires a combination of quantum and classical capabilities: discretizing and signaling physical qubit errors through non-demolition quantum parity measurements, and tracking these errors with a classical controller that simultaneously advances computation. I present an implementation of the textbook quantum repetition code protecting one logical qubit (a two-dimensional subspace in a three-qubit Hilbert space) from bit-flip error, realized on a circuit QED processor with twelve superconducting quantum elements controlled by room-temperature electronics. The discussion of this processor’s performance and limitations motivates a survey of current efforts in QuTech targeting a scalable quantum architecture and scalable control electronics for protecting quantum data against arbitrary errors.
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